ring_regs_slv_map.h

#pragma once
 
// Register space: Ring Configuration Register Register Space (Slave)
#include <string>
#include <unordered_map>
 
const std::unordered_map<std::string, uint32_t> ring_register_slv_map = {
    {"REGBANK_VERSION", 0x00400000},
    {"PHASH", 0x00400004},
    {"VERS_SLV", 0x00400008},
    {"GIT_HASH2", 0x0040000c},
    {"GIT_HASH1", 0x00400010},
    {"GIT_HASH0", 0x00400014},
    {"RVSR_SLV", 0x00400018},
    {"BRDY_SLV", 0x0040001c},
    {"CW_L_SLV", 0x00400020},
    {"CCWL_SLV", 0x00400024},
    {"STME_SLV", 0x00400028},
    {"CSEL_SLV", 0x0040002c},
    {"NDID_SLV", 0x00400030},
    {"TM_INT_SLV", 0x00400034},
    {"TM_FRAC_SLV", 0x00400038},
    {"SJA_TEST", 0x0040003c},
    {"MRDY_SLV", 0x00400040},
    {"ICDY_SLV", 0x00400044},
    {"LCL_1HZ_TAR_SLV", 0x00400048},
    {"WDOG_TIMEOUT_CYCLES", 0x0040004c},
    {"TM_FRAC_OFLOW_ERR_SLV", 0x00400050},
    {"CLR_TM_FRAC_OFLOW_ERR_SLV", 0x00400054},
    {"TM_FRAC_ERR_RCVD_RX_0_SLV", 0x00400058},
    {"TM_FRAC_ERR_RCVD_RX_1_SLV", 0x0040005c},
    {"DLY_RX0_TX1_SLV", 0x00400060},
    {"DLY_RX1_TX0_SLV", 0x00400064},
    {"DLY_RX_TIME_SLV", 0x00400068},
    {"TYPE1_USR", 0x0040006C},
    {"TYPE2_USR", 0x00400070}
};